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Memory

BottleneckCore: AI training, AI inferenceHigh: Robotics, EV / auto, Consumer / IoT, Industrial

Memory: DRAM / HBM / NAND

NAND and DRAM capabilities have improved, but HBM is a central AI bottleneck and remains hard to localize at the frontier.

The simple version

Memory stores the data chips are working on. For AI, the issue is not just how much memory exists, but how fast data can move between memory and compute.

What the technology does

  • DRAM is working memory. NAND is storage. is high-bandwidth memory stacked close to accelerators for AI workloads.
  • Memory is brutally cyclical: shortages create huge profits, oversupply creates crashes.
  • is harder than ordinary DRAM because it combines advanced memory, stacking, packaging, and close coordination with GPU vendors.

Market scale

  • Samsung, SK hynix, and Micron dominate DRAM and ; Samsung, Kioxia, Western Digital, Micron, SK hynix, and YMTC matter in NAND.
  • has become one of the most important AI bottlenecks because accelerator performance is often memory-bound.
  • Scale is enormous: leading memory makers are multi-tens-of-billions revenue companies in good cycles.
Global references
  • SK hynixSouth Korea · 000660.KS
  • SamsungSouth Korea · 005930.KS
  • MicronUnited States · MU
  • KioxiaJapan · 285A.T
  • Western DigitalUnited States · WDC

China angle

YMTC is the NAND anchor, CXMT is the DRAM anchor, and JHICC is a cautionary tale about how exposed memory is to sanctions. is the central strategic gap because it sits directly inside the AI accelerator supply chain.

China references

How we got here

China's memory push accelerated in the 2010s with state-backed projects. NAND progressed faster than DRAM. The AI era shifted attention toward , where China is still trying to prove credible capability.

  1. 2000s

    Global memory consolidates around a handful of Korean, US, and Japanese-rooted players.

  2. 2016-2019

    China backs major NAND and DRAM projects; YMTC and CXMT become the names to track.

  3. 2022-2024

    AI accelerators make strategically important and harder to source.

  4. 2025+

    Watch credible roadmaps, yields, and whether Chinese AI chips can get enough memory.

Why it matters

AI performance is increasingly memory-bound. Robotics and edge AI also need power-efficient memory, but datacenter is the strategic choke point.

Main bottleneck

, advanced DRAM nodes, tool restrictions, , packaging integration, and export controls.

Where this sector shows up

Core
AI training, AI inference
High
Robotics, EV / auto, Consumer / IoT, Industrial

What to watch

  • roadmap claims
  • CXMT DRAM node progress
  • YMTC NAND adoption
  • Equipment access
  • Packaging partnerships

Chip pricing

7 chips from this sector are in the pricing dataset — domestic parts and their global references, each with dated, source-linked price observations. Latest figure shown per chip.

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