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Xpeedic

xpeedic.comReviewed 2026-08-30

Xpeedic, founded 2010 in Shanghai by Dr. Feng Ling and Dai Wenliang (both EDA-industry veterans of Synopsys, Cadence and Mentor), provides full-stack chip-package-system EDA spanning SI/PI, electromagnetic and electro-thermal simulation, integrated passive devices and a Chiplet advanced-packaging platform. It raised over seven rounds (January 2021 B round above RMB 100 million, investors include China Fortune/SMIC's 中芯聚源 and SAIC), saw an Empyrean 100% acquisition plan announced March 2025 and terminated July 2025, and completed CITIC-sponsored A-share IPO tutoring in December 2025. Revenue reached RMB 265 million in 2024 with net profit of RMB 48 million.

Scale

—no public financials
privatenot exchange-listed

Gap vs frontier

Bottlenecksector position

Sector-level position; no priceable accelerator silicon to compare chip-by-chip.

The chip stackEach layer depends on the layers below it
1 · ChipsWhat the stack produces
2 · Design toolsSoftware and IP to design them
EDA · Bottleneck
3 · ManufacturingPlants that turn designs into silicon
4 · EquipmentMachines inside the plants
5 · MaterialsWhat the plants consume

Company at a glance

Scale

Private, not exchange-listed

Growth prospects

Expanding customer base and product roadmap

via stcn.com ↗2023: revenue about RMB 106 million, net loss RMB 89.9 million; 2024: revenue about RMB 265 million, net profit RMB 48.1 million — a swing to profit,…via news.cn ↗Empyrean (华大九天) announced a plan on 2025-03-31 to acquire 100% of Xpeedic; the attempt was terminated in July 2025 and Xpeedic returned to an indepen…

China competition

Competes with Empyrean, Primarius, Semitronix in EDA — peers listed at sector level.

Bottleneck

Global comparables

Global reference set: Synopsys, Cadence, Siemens EDA.

Synopsys/Ansys (Ansys HFSI/SIwave-class EM-thermal simulation)

Technical gap

Sector rated bottleneck vs the frontier.

Obstacles

Sector bottleneck applies

Full-flow coverage, advanced-node validation, foundry PDK integration, IP ecosystem, and decades of accumulated tool trust.

Official filings: CLS/Science & Technology Board Daily: A-share IPO tutoring filing (Feb 2025) ↗

All sourced facts (8)
  • Founders: Founded 2010 in Shanghai by Dr. Feng Ling (PhD, University of Illinois Urbana-Champaign 2000; career across Synopsys, Cadence and Mentor; co-founded Physware in 2007, sold to Mentor Graphics in 2010) together with Dai Wenliang, also ex-Big-Three EDA via ednchina.com ↗
  • Product scope: Full-stack integrated-system EDA from chip, package, module and PCB to system, covering SI/PI/EM/thermal simulation and supporting Chiplet advanced packaging for 5G and high-frequency smart hardware via 21jingji.com ↗
  • Funding: More than seven rounds raised; January 2021 B round above RMB 100 million led by Shanghai Sailing (赛领) with Shanghai IoT Fund increasing its stake; shareholders include 中芯聚源 (SMIC-affiliated) and SAIC Group via chinaventure.com.cn ↗
  • Financials (from Empyrean deal disclosure): 2023: revenue about RMB 106 million, net loss RMB 89.9 million; 2024: revenue about RMB 265 million, net profit RMB 48.1 million — a swing to profit, predominantly EDA software sales via stcn.com ↗
  • Empyrean acquisition attempt: Empyrean (华大九天) announced a plan on 2025-03-31 to acquire 100% of Xpeedic; the attempt was terminated in July 2025 and Xpeedic returned to an independent IPO path via news.cn ↗
  • IPO tutoring: Filed tutoring registration with the Shanghai CSRC bureau on 2025-02-07 with CITIC Securities as sponsor for an A-share IPO; the tutoring completion report was submitted 2025-12-20/24 via cls.cn ↗
  • Product releases: Xpeedic EDA 2025 released at its user conference on 2025-10-31 under an 'AI+EDA for AI' theme; EDA 2026 announced with the EDA Agent research results showcased in 2026 via xpeedic.com ↗
  • Recognition: Participant winner of a National Science and Technology Progress First Prize (国家科学技术进步奖一等奖) via cnstock.com ↗

About

Develops and licenses EDA software for chip-package-system co-simulation and advanced packaging design (Chiplet, SiP, IPD), serving 5G, high-speed computing and AI hardware designers; revenue is predominantly EDA tool licenses, funded by venture capital and now an A-share IPO track.

Why it matters

Electromagnetic/thermal sign-off and Chiplet interconnect analysis are exactly where Synopsys (Ansys), Cadence (Sigrity) and Siemens EDA concentrate power; Xpeedic is one of the top domestic EDA players and the only first-tier Chinese vendor specializing in the chip-to-system simulation stack, which is why Empyrean attempted to buy it and why its IPO is a bellwether for EDA consolidation and localization.

Where it sits in the stack

Design

EDA software

Bottleneck

Full-flow coverage, advanced-node validation, foundry PDK integration, IP ecosystem, and decades of accumulated tool trust.

AI trainingAI inferenceRoboticsEV / auto

Key semiconductor products

  • Electromagnetic simulation and SI/PI/thermal co-simulation EDA for chip-package-system flows
  • Chiplet advanced-packaging EDA platform and 2.5D/3D interconnect analysis
  • Integrated passive device (IPD) and SiP design solutions
  • Xpeedic EDA 2025/2026 software suites including the EDA Agent AI assistant direction·2025

Ecosystem

Global peer set

  • Synopsys/Ansys (Ansys HFSI/SIwave-class EM-thermal simulation)
  • Cadence (Sigrity/Clarity)
  • Siemens EDA (HyperLynx, formerly Mentor — where the founders' Physware was acquired)
  • Keysight EDA (ADS)

Competitive position

  • First tier of domestic EDA (with Empyrean, Primarius, Semitronix-class peers), differentiated by the chip-to-system simulation stack rather than point tools
  • Media categorize Xpeedic among IPO-queue EDA unicorns alongside 合见工软 while listed peers Empyrean, Primarius and Semitronix trade on ChiNext/STAR
  • Global EDA remains about 80% held by Synopsys, Cadence and Siemens EDA, defining the substitution runway
  • Global comparables: Synopsys/Ansys (Ansys HFSI/SIwave-class EM-thermal simulation)
  • Global comparables: Cadence (Sigrity/Clarity)
  • Global comparables: Siemens EDA (HyperLynx, formerly Mentor — where the founders' Physware was acquired)
  • Global comparables: Keysight EDA (ADS)

Milestones and signals

  • 2021—B Round Financing: CNY Above RMB 100 million
  • 2023—Revenue: CNY About RMB 106 million
  • 2023—Net Loss: RMB 89.9 million
  • 2024—Revenue: CNY About RMB 265 million

What to watch

  • A-share IPO filing after tutoring completion (December 2025)
  • Chiplet/2.5D-3D packaging design wins as Chinese advanced packaging scales
  • AI-driven EDA agent capabilities against the Big Three's AI roadmaps
  • Renewed consolidation interest from domestic EDA platforms

Questions

Last reviewed 2026-07-11

Answered questions

What is the measurable gap versus global reference companies?

First tier of domestic EDA (with Empyrean, Primarius, Semitronix-class peers), differentiated by the chip-to-system simulation stack rather than point tools.

Open questions

  • Which products are qualified beyond pilots in fabless?
  • Which customers, fabs, or end markets show real adoption rather than policy interest?