Specifications
Sourced specs
| Spec | Value | Source |
|---|---|---|
| Memory | 96 GB HBM2e | via reuters.com ↗2025-09-17 |
| Interconnect | 700 GB/s (chip-to-chip) | via eetimes.com ↗2025-09-23 |
| Board power (TDP) | 400 W | via eetimes.com ↗2025-09-23 |
| Performance | On par with Nvidia H20 (state-media benchmarks) | via eetimes.com ↗2025-09-23 |
| Bill-of-materials cost | ~40% lower per card than Nvidia H20 | via eetimes.com ↗2025-09-23 |
| Flagship deployment | 16,384 PPU units (~72% of AI chips) in China Unicom's $390M, 20,000-petaflops Xining data center | via reuters.com ↗2025-09-17 |
| Foundry / node | Domestic manufacture, likely SMIC 7 nm | via eetimes.com ↗2025-09-23 |
| Software compatibility | Compatible with existing Nvidia software frameworks (CUDA), enabling minimal software changes | via eetimes.com ↗2025-09-23 |
Pricing
Price history, newest first
No public price observation yet.
vendor-official or multiple independent reports · single major report or several secondary · estimate or lone secondary source
Prices in USD, converted at each observation year's average exchange rate; the original figure and rate print under every converted price. How prices are sourced and graded ↗
Context
Notes
- No selling price disclosed; the 40%-below-H20 figure is a BOM cost comparison, not a transaction price.
- Naming: Reuters and EE Times call the 2025 chip 'PPU'; Alibaba's official materials (May 2026) name the shipping inference line 'Zhenwu 810E' as predecessor of the M890, and no source explicitly maps 'PPU' to 'Zhenwu 810E'.
Where it sits
In the stack
All specs and prices link to their original sources, dated as observed. Figures are market observations, not offers; treat each as of its date.